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Några andra slumpade jobb:

1. Senior ASIC Verification Engineer- Stockholm
   
   
2. ASIC Verification Engineer- Stockholm
   
   
3. ASIC Verification Engineer- Stockholm
   
   
4. Senior ASIC Verification Engineer- Stockholm
   
   
5. Senior Technical Writer- Stockholm
   
   
6. Senior Software Applications Engineer- Stockholm
   
   
7. ASIC Backend Engineer- Stockholm
   
   

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Senior ASIC Verification Engineer
Marvell Technology Sweden is a development site for IC devices and related SW products for the high end Network Processor market. The development of IC devices is fully undertaken within our team in Stockholm. This team manages all aspects of development of very large integrated circuits, i.e. architectural design, VHDL design, verification, layout, technology and IP selection. As a Verification Engineer at Marvell Sweden, you will be responsible for verification of significant functional blocks of the chip, or complete subsystems. You will participate in verification specification work, define requirements of test environments and independently implement tests according to specification. You will also jointly with colleagues evaluate and implement state-of-the-art verification methodologies and tools. The Verification Engineer is also a key contributor in lab validation of ASIC devices. The Traffic Management subsystem is developed in close cooperation with Marvell Israel and the verification engineer will work closely with collegues in Israel during the integration work. You will report to the Director ASIC & HW. Specific tasks will include: - Writing and reviewing verification specifications - Definition and development of test environments and test benches in SpecMan and System Verilog - Implementation of test cases in the appropriate language - Lab validation of functionality in ASIC devices Candidate profile: - Completed MScEE or equivalent - 3-5 years of professional experience of ASIC verification is required - Experience from verification of Traffic Management category of functionality is required - Experience from VHDL and related simulators is required - Experience from SpecMan is required - Experience from other languages such as C, tcl, PSL is a benefit - Located in the Stockholm area or willing to relocate. In possession of an EU work permit
Företag: Marvell Technology Sweden AB
Ort: Stockholm
Publicerad : 02-13
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ASIC Verification Engineer
Marvell Technology Sweden is a development site for IC devices and related SW products for the high end Network Processor market. The development of IC devices is fully undertaken within our team in Stockholm. This team manages all aspects of development of very large integrated circuits, i.e. architectural design, VHDL design, verification, layout, technology and IP selection. As a Verification Engineer at Marvell Sweden, you will be responsible for verification of significant functional blocks of the chip, or complete subsystems. You will participate in verification specification work, define requirements of test environments and independently implement tests according to specification. You will also jointly with colleagues evaluate and implement state-of-the-art verification methodologies and tools. The Verification Engineer is also a key contributor in lab validation of ASIC devices. You will report to a Subsystem Design Manager. Specific tasks will include: - Writing and reviewing verification specifications - Definition and development of test environments and test benches in SpecMan and System Verilog - Implementation of test cases in the appropriate language - Lab validation of functionality in ASIC devices Qualifications: - Completed MScEE or equivalent - 3-5 years of professional experience of ASIC Verification - Experience in VHDL and related simulators is required - Experience from SpecMan required - Experience from SystemVerilog, C, tcl, PSL is a benefit
Företag: Marvell Technology Sweden AB
Ort: Stockholm
Publicerad : 11-06
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ASIC Verification Engineer
Marvell Technology Sweden is a development site for IC devices and related SW products for the high end Network Processor market. The development of IC devices is fully undertaken within our team in Stockholm. This team manages all aspects of development of very large integrated circuits, i.e. architectural design, VHDL design, verification, layout, technology and IP selection. As a Verification Engineer with focus HW Based Vericication, you will be responsible for emulation based verification of complete subsystems or combinations of subsystems. You will also define and use FPGA based platforms for verification of algorithmic functions. Participation in verification specification work and definition of requirements of test environments are other aspects of the job. The Verification Engineer is also a key contributor in lab validation of ASIC devices. You will report to the Verification Manager. Qualifications: - Completed MScEE or equivalent - 3-5 years of professional experience of ASIC verification - Experience in VHDL and related simulators is required - Experience from Palladium or similar emulation technologies is a benefit - Experience from SystemVerilog, e, perl and c is a benefit Specific tasks will include: - Writing and reviewing verification specifications - Definition and development of test environments and test benches for use in emulation - Implementation of test cases in emulation or FPGA based verification - Maintenance and improvements of emulation technology - Lab validation of functionality in ASIC devices
Företag: Marvell Technology Sweden AB
Ort: Stockholm
Publicerad : 11-06
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Senior ASIC Verification Engineer
Marvell Technology Sweden is a development site for IC devices and related SW products for the high end Network Processor market. The development of IC devices is fully undertaken within our team in Stockholm. This team manages all aspects of development of very large integrated circuits, i.e. architectural design, VHDL design, verification, layout, technology and IP selection. As a Verification Engineer at Marvell Sweden, you will be responsible for verification of significant functional blocks of the chip, or complete subsystems. You will participate in verification specification work, define requirements of test environments and independently implement tests according to specification. You will also jointly with colleagues evaluate and implement state-of-the-art verification methodologies and tools. The Verification Engineer is also a key contributor in lab validation of ASIC devices. You will report to a Subsystem Design Manager. Qualifications: - Completed MScEE or equivalent - 3-5 years of professional experience of ASIC verification - Experience from VHDL and related simulators is required - Experience from SpecMan is required - Experience from other languages such as SystemVerilog, C, tcl, PSL is a benefit Specific tasks will include: - Writing and reviewing verification specifications - Definition and development of test environments and test benches in SpecMan and System Verilog - Implementation of test cases in the appropriate language - Lab validation of functionality in ASIC devices
Företag: Marvell Technology Sweden AB
Ort: Stockholm
Publicerad : 11-06
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Senior Technical Writer
Marvell Technology Sweden AB is seeking an experienced Technical Writer and Project Manager with knowledge and experience of the communication industry and especially hardware and software for carrier class switches and routers. You will work with documentation of all aspects of our network processors and associated software. Responsibilities: - Manage technical documentation projects - Design, create and maintain technical documentation including user guides, system descriptions and specifications, user manuals, and other documents. - Generate information in the absence of engineering specifications or other product requirement documents. - Gathering and analyzing information by collaborating with developers to clarify technical issues; liaising with subject matter experts and technical specialist. - Work with a broad range of individuals within the company. - Accommodate frequent engineering changes. - Acquire and maintain expertise in tools required to produce our materials. - As an integral part of a cross-functional team, learn Marvell products by hand-on experience Qualifications: - Must have three to five years experience as technical writer. - Must have three to five years experience as project manager of multi disciplinary projects. - Excellent knowledge of and experience from project management methodology, processes and tools. - Experience from writing functional specifications as well as hardware and software documentation. - Excellent knowledge and experience of Microsoft office packages and FrameMaker. - Good knowledge in HTML and XML. - Experience with hardware and software development lifecycle challenges. - Demonstrated ability to both work independently and collaborate among staff located at remote sites. - Demonstrated ability to interview, research, and write clearly. Language skills: You are either a native English speaker or have superb English skills. It is considered a merit if you are fluent in Swedish as well but is not a requirement as all materials is produced in English. Characteristics: - Structured and analytical mind-set - Ready to assume project management responsibility - Able to take initiatives and work without detailed instructions - Well-developed communication skills.
Företag: Marvell Technology Sweden AB
Ort: Stockholm
Publicerad : 11-07
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Senior Software Applications Engineer
Marvell is seeking skilled software developers with knowledge and experience of link and network layer protocols. You will work with layer 2 to layer 4 applications for our network processors (NPUs). The network processors perform packet processing in switch and router systems. It is important that you have a huge interest in working with network solutions and a good understanding of software development for embedded systems. As an Senior NPU Appliaction Developer at Marvell, you will work as a member of the development team and be responsible for design, implementation, integration, test and documentation of the NPU Applications. Specific tasks will include: - Overall design and dimentioning of NPU applications - Protocol implementations for the NPUs - Assembler level programming for the network processor - C programming for system integration - Writing customer related documents e.g. manuals and application notes Work Experience and Education: - MSc EE, MSc CS or equivalent required - Experience from programming in C/C++ as well as assembly level - Experience of developing software for embedded systems. - Knowledge of switch and router systems and communications protocols such as Ethernet, IP, TCP and MPLS - Knowledge of Linux is meriting Characteristics: - Structured and analytical mind-set - Ready to assume technical responsibility - Able to take initiatives and work without detailed instructions - Well-developed communication skills - You are fluent in English and are able to write advanced technical material - You enjoy an international environment and are prepared to travel from time to time
Företag: Marvell Technology Sweden AB
Ort: Stockholm
Publicerad : 11-07
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ASIC Backend Engineer
Marvell Technology Sweden is a development site for IC devices and related SW products for the high end Network Processor market. The development of IC devices is fully undertaken within our team in Stockholm. This team manage all aspects of development of very large integrated circuits, i.e. architectural design, VHDL design, verification, layout, technology and IP selection. An ASIC Backend Engineer you will work in two different technical domains, block level backend closure and subsystem timing closure. The skill set required from an engineer in backend closure is typically layout flows such as ICC or Talus, while the skill set when working with timing closure typically is static timing analysis and clock distribution techniques. A backend engineer should be efficient within both domains. In block level backend closure, you will be responsible for physical implementation of functional blocks, so called hardmacs. This involves managing tools for different steps of an implementation flow, such as RTL synthesis, place&route (P&R), parasitics extraction and static timing analysis. Our tools suite is based on tools from Talus and Primetime. The work can also be on top level, building layout structures such as power mesh, RDL etc. In subsystem timing closure, you will be responsible for static timing analysis of subsystems containing some 15-30 physical blocks, in some cases even more. You will define block level timing constraints and clock insertion scheme, analyze interface timing and ensure that appropriate measures are implemented by backend engineers or designers. The backend engineer works closely with other backend engineers and lead designers to reach backend closure on blocks and on subsystems. Marvell offers a challenging environment where architects, designers, verification engineers and backend engineers work closely to meet the market requirements of next generation products. The team in Stockholm cooperates with other Marvell teams in Santa Clara, USA and in Tel Aviv, Israel. You will report to the Subsystem Designer Manager. Specific tasks may include, depending on technical domain and responsibility: - Use of existing tool chain to achieve timing and DRC closure of blocks - Floorplanning, synthesis, P&R - DRC&LVS closure - Use of existing tool chain to achieve timing closure of susbsystems - Static timing analysis - Definition and implementation of clock trees Candidate profile: - Completed MScEE or equivalent - Previous experience in the area of place & route is a requirement - Previous experiences from Synopsys? Talus backend tools suites is a requirement - Previous experiences in the area of timing STA using Synopsys? PrimeTime is a requirement - Previous experience of backend of large digital functions is a requirement - Fluent in English - Located in the Stockholm area, or willing to relocate Application should be written in English.
Företag: Marvell Technology Sweden AB
Ort: Stockholm
Publicerad : 11-21
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