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Några andra slumpade jobb:
- Senior ASIC Verification Engineer, System Verilog- Ospecificerad arbetsort
- ASIC/FPGA Lab Engineer- Ospecificerad arbetsort
- Senior ASIC Verification Engineer, System Verilog- Ospecificerad arbetsort
- ASIC/FPGA Lab Engineer- Ospecificerad arbetsort
- FPGA Designer- Ospecificerad arbetsort
Mer beskrivning
Senior ASIC Verification Engineer, System VerilogThe project scope is to develop new radio technology for 5G and some new radio based products for 4G. You will work with functional verification of new ASICs and FPGAs. The work will be carried out in close cooperation with RTL designers. The work includes: Verification planning Verification specification Verification environment (creation/adaptation/maintenance). Test case creation Usage of uVC´s Development of uVC´s (if needed) Usage of reference models (if needed) Constrained random testing Creation of Coverage matrix Writing Verification Reports Long experience from ASIC verification and test bench development Good knowledge of System Verilog and VHDL Experience from working with simulation tools such as Mentor and Cadence Experience from block level and sub-system level test benches using UVM Experience with version control systems English (verbal and writing) You will work as a consultant at our customers' sites paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 07-05
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ASIC/FPGA Lab Engineer
The overall project scope is to verify new radio technology in 5G Radio Base Stations. You will work with intergration and verification of FPGAs in new prototypes The work will be carried out in close cooperation development engineers. The work includes: Lab verification and measurements Lab measurement equipment handling Scripting/programming in Perl, Python, Bash or C-shel Debugging with complex digital designs IP level and system level verification UNIX and/or Linux Long experience from the ASIC/FPGA industry (+7 years) Excellent skills in lab verification and measurements Knowledge in lab measurement equipment handling Scripting/programming in Perl, Python, Bash or C-shell (neat, commented, maintainable code, no warnings) Excellent debugging skills with complex digital designs Experience with IP level and system level verification Good skills in working with UNIX and/or Linux English (verbal and writing) You will work as a consultant at our customers' sites paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 08-14
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Senior ASIC Verification Engineer, System Verilog
The project scope is to develop new radio technology for 5G and some new radio based products for 4G. You will work with functional verification of new ASICs and FPGAs. The work will be carried out in close cooperation with RTL designers. The work includes: Verification planning Verification specification Verification environment (creation/adaptation/maintenance). Test case creation Usage of uVC´s Development of uVC´s (if needed) Usage of reference models (if needed) Constrained random testing Creation of Coverage matrix Writing Verification Reports Long experience from ASIC verification and test bench development Good knowledge of System Verilog and VHDL Experience from working with simulation tools such as Mentor and Cadence Experience from block level and sub-system level test benches using UVM Experience with version control systems English (verbal and writing) You will work as a consultant at our customers' sites paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 10-10
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Klicka här och sök jobb som: Senior ASIC Verification Engineer, System Verilog
ASIC/FPGA Lab Engineer
The overall project scope is to verify new radio technology in 5G Radio Base Stations. You will work with intergration and verification of FPGAs in new prototypes The work will be carried out in close cooperation development engineers. The work includes: Lab verification and measurements Lab measurement equipment handling Scripting/programming in Perl, Python, Bash or C-shel Debugging with complex digital designs IP level and system level verification UNIX and/or Linux Long experience from the ASIC/FPGA industry (+7 years) Excellent skills in lab verification and measurements Knowledge in lab measurement equipment handling Scripting/programming in Perl, Python, Bash or C-shell (neat, commented, maintainable code, no warnings) Excellent debugging skills with complex digital designs Experience with IP level and system level verification Good skills in working with UNIX and/or Linux English (verbal and writing) You will work as a consultant at our customers' sites paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 10-10
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FPGA Designer
You will be employed as consultant and work at our customer's site, either in Stockholm, Gothenburg or Lund. You will work with ASIC/FPGA. Structured, self-driven, flexible Able to travel outside Sweden to other international design centers You will be employed as consultant and work at our customer's sites, either in Stockholm, Gothenburg or Lund.
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 11-08
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