Paventia AB jobb - alla lediga jobb

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Hittade inga lediga jobb på sökning: Paventia AB. Sök vidare
Några andra slumpade jobb:

1. ASIC verification engineer- Lidingö
   
   
2. Senior ASIC Verification, System Verilog- Ospecificerad arbetsort
   
   
3. ASIC/FPGA Designer/Integrator- Ospecificerad arbetsort
   
   
4. Senior Validation Lead- Ospecificerad arbetsort
   
   
5. HR-assistent- Lidingö
   
   
6. Senior ASIC Verification Engineer, System Verilog- Ospecificerad arbetsort
   
   
7. ASIC/FPGA Lab Engineer- Ospecificerad arbetsort
   
   
8. Senior ASIC Verification Engineer, System Verilog- Ospecificerad arbetsort
   
   
9. ASIC/FPGA Lab Engineer- Ospecificerad arbetsort
   
   
10. FPGA Designer- Ospecificerad arbetsort
    
    

Mer beskrivning

ASIC verification engineer
The project scope is to develop new radio technology for 5G and some new radio based products for 4G. You will work with functional verification of new ASICs and FPGAs. The work will be carried out in close cooperation with RTL designers. The work includes: Verification planning Verification specification Verification environment (creation/adaptation/maintenance). Test case creation Usage of uVC´s Development of uVC´s (if needed) Usage of reference models (if needed) Constrained random testing Creation of Coverage matrix Writing Verification Reports Long experience from ASIC verification and test bench development Good knowledge of System Verilog and VHDL Experience from working with simulation tools such as Mentor and Cadence Experience from block level and sub-system level test benches using UVM/OVM Experience with version control systems English (verbal and writing) You will work as a consultant at our customers' sites
Företag: Paventia AB
Ort: Lidingö
Publicerad : 12-06
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Senior ASIC Verification, System Verilog
The project scope is to develop new radio technology for 5G and some new radio based products for 4G. You will work with functional verification of new ASICs and FPGAs. The work will be carried out in close cooperation with RTL designers. The work includes: Verification planning Verification specification Verification environment (creation/adaptation/maintenance). Test case creation Usage of uVC´s Development of uVC´s (if needed) Usage of reference models (if needed) Constrained random testing Creation of Coverage matrix Writing Verification Reports Long experience from ASIC verification and test bench development Good knowledge of System Verilog and VHDL Experience from working with simulation tools such as Mentor and Cadence Experience from block level and sub-system level test benches using UVM/OVM Experience with version control systems English (verbal and writing) You will work as a consultant at our customers' sites paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 03-15
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ASIC/FPGA Designer/Integrator
You will be employed as consultant and work at our customer's site, either in Stockholm, Gothenburg or Lund. You will work with ASIC/FPGA design and/or integration. Structured, self-driven, flexible Able to travel outside Sweden to other international design centers You will be employed as consultant and work at our customer's sites, either in Stockholm, Gothenburg or Lund.
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 04-25
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Senior Validation Lead
As an ASIC validation leader you will be the E2E responsible within radio design to ensure the new digital ASICs performance and introduction. You will lead high performing teams to plan and perform advanced tests and to analyze the results. You will be working with state of the art designs leading skilled designers from different disciplines. Competence/Experience – Mandatory Experience from ASIC validation and developing specifications for ASIC validation Experience in ASIC design and/or electronic design either as a designer or a technical leader English (verbal and writing) Competence/Experience – Optional Experience from ASIC performance analysis Experience from leading cross functional teams Experience from R&D project management Experience from working with Agile development methodology Academic degree i relevant field Swedish (verbal and writing) Personality Result oriented Ability to take own initiatives / drive improvements Team player Networking skills You will be employed as consultant and work at our customer's sites, either in Stockholm, Gothenburg or Lund. paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 04-30
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HR-assistent
Paventia AB är en konsultmäklare inom teknik och IT. Vi jobbar i huvudsak med konsultuppdrag där det är lite svårare att hitta rätt konsulter. Vi ägnar mycket tid på att söka upp precis rätt kompetens. Som HR-assistent kommer du att jobba med - Publicera nya konsultuppdrag på vår hemsida och i ett antal andra kanaler - Söka kandiater i vår egen kandidatdatabas och på LinkedIn (full Recruiter licens) utifrån givna sökkriterier - Kontakta kandidater via telefon och mejl - Ansvara för initial screening och registering av ansökningar - Formatering av kandidat CV i MS Word (både svenska och engelska CV) Beroende på erfarenhet och intresse kan rollen senare även utökas med andra uppgifter, till exempel - Konsultintervjuer - Introduktion av konsult hos kund, uppföljning av pågående kontrakt, förlängning av kontrakt - Tid- och fakturaregistrering, lönehantering Du behöver vara självständig, noggrann och intresserad av att lära dig många nya saker. Du behöver även vara bra på att kommunicera, både i tal (telefon) och i skrift. Datorvana (PC) är ett absolut krav, liksom erfarenhet av Internet och sociala medier. Vi håller på och flyttar till nya lokaler i Torsvik (nära Ropsten, precis vid Lidingöbron, ca 2 minuter med buss, de flesta bussar på Lidingö går via denna hållplats).
Företag: Paventia AB
Ort: Lidingö
Publicerad : 05-16
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Senior ASIC Verification Engineer, System Verilog
The project scope is to develop new radio technology for 5G and some new radio based products for 4G. You will work with functional verification of new ASICs and FPGAs. The work will be carried out in close cooperation with RTL designers. The work includes: Verification planning Verification specification Verification environment (creation/adaptation/maintenance). Test case creation Usage of uVC´s Development of uVC´s (if needed) Usage of reference models (if needed) Constrained random testing Creation of Coverage matrix Writing Verification Reports Long experience from ASIC verification and test bench development Good knowledge of System Verilog and VHDL Experience from working with simulation tools such as Mentor and Cadence Experience from block level and sub-system level test benches using UVM Experience with version control systems English (verbal and writing) You will work as a consultant at our customers' sites paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 07-05
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ASIC/FPGA Lab Engineer
The overall project scope is to verify new radio technology in 5G Radio Base Stations. You will work with intergration and verification of FPGAs in new prototypes The work will be carried out in close cooperation development engineers. The work includes: Lab verification and measurements Lab measurement equipment handling Scripting/programming in Perl, Python, Bash or C-shel Debugging with complex digital designs IP level and system level verification UNIX and/or Linux Long experience from the ASIC/FPGA industry (+7 years) Excellent skills in lab verification and measurements Knowledge in lab measurement equipment handling Scripting/programming in Perl, Python, Bash or C-shell (neat, commented, maintainable code, no warnings) Excellent debugging skills with complex digital designs Experience with IP level and system level verification Good skills in working with UNIX and/or Linux English (verbal and writing) You will work as a consultant at our customers' sites paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 08-14
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Senior ASIC Verification Engineer, System Verilog
The project scope is to develop new radio technology for 5G and some new radio based products for 4G. You will work with functional verification of new ASICs and FPGAs. The work will be carried out in close cooperation with RTL designers. The work includes: Verification planning Verification specification Verification environment (creation/adaptation/maintenance). Test case creation Usage of uVC´s Development of uVC´s (if needed) Usage of reference models (if needed) Constrained random testing Creation of Coverage matrix Writing Verification Reports Long experience from ASIC verification and test bench development Good knowledge of System Verilog and VHDL Experience from working with simulation tools such as Mentor and Cadence Experience from block level and sub-system level test benches using UVM Experience with version control systems English (verbal and writing) You will work as a consultant at our customers' sites paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 10-10
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ASIC/FPGA Lab Engineer
The overall project scope is to verify new radio technology in 5G Radio Base Stations. You will work with intergration and verification of FPGAs in new prototypes The work will be carried out in close cooperation development engineers. The work includes: Lab verification and measurements Lab measurement equipment handling Scripting/programming in Perl, Python, Bash or C-shel Debugging with complex digital designs IP level and system level verification UNIX and/or Linux Long experience from the ASIC/FPGA industry (+7 years) Excellent skills in lab verification and measurements Knowledge in lab measurement equipment handling Scripting/programming in Perl, Python, Bash or C-shell (neat, commented, maintainable code, no warnings) Excellent debugging skills with complex digital designs Experience with IP level and system level verification Good skills in working with UNIX and/or Linux English (verbal and writing) You will work as a consultant at our customers' sites paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 10-10
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FPGA Designer
You will be employed as consultant and work at our customer's site, either in Stockholm, Gothenburg or Lund. You will work with ASIC/FPGA. Structured, self-driven, flexible Able to travel outside Sweden to other international design centers You will be employed as consultant and work at our customer's sites, either in Stockholm, Gothenburg or Lund.
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 11-08
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