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Några andra slumpade jobb:

1. Senior ASIC Verification Engineer- Stockholm
   
   
2. Senior ASIC Verification Engineer, Specman- Stockholm
   
   
3. Senior ASIC Verification Engineer- Stockholm
   
   
4. Senior ASIC verification engineers- Stockholm
   
   
5. Senior ASIC Verification Engineer- Stockholm
   
   
6. Senior ASIC verification engineer- Göteborg
   
   
7. Senior ASIC verification engineer, Stockholm- Stockholm
   
   
8. Senior ASIC verification Engineer- Lund
   
   
9. Senior ASIC verification engineer, Stockholm- Stockholm
   
   
10. Senior ASIC Verification Engineer, System Verilog- Ospecificerad arbetsort
    
    
11. Senior ASIC Verification Engineer, System Verilog- Ospecificerad arbetsort
    
    

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Senior ASIC Verification Engineer
Aurenav is looking to fill 4 Senior ASIC Verification Engineering positions at our Stockholm, Sweden office Qualifications and requirements: Job description Developing advanced systems with high data rates. You will working with among the most advanced and complex ASIC's in the world in 28 nm. You will be working in a team of several ASIC developers. Competence/Experience - Must have Long Experience of ASIC verification with Specman (e language, tools and methodology and building eVC's) Experience of developing eVC's and test benches, preferably from scratch Long Experience from block level verification, functional verification, test coverage strategies Experience of constrained random verification, functional coverage and building verification testbenches with Specman Experience of working with complex digital ASIC verification with several DSP's, CPU's and high speed links Experience from formal verification, e.g. using assertions and constraints Experience of design in VHDL Fluent in English (verbal and writing) Competence/Experience - Nice to have Experience of working with SystemVerilog UVM (pref) or OVM Experience of developing oVC's/uVC's and test benches, preferably from scratch Long experience from ASIC top level/system/SoC level verification and test coverage strategies Long Experience from top level verification with Specman Experience from C or C++ programming for top level verification Experience of SystemC Experience from top level verification using TLM (transaction level model) Personality Self-motivated and driven, take initiative, open, see big picture, like challenges Social, team player Assignment info Location: Stockholm onsite Assignment start: ASAP Full Time Work
Företag: AURENAV SWEDEN FILIAL AV AURENAV LLC USA
Ort: Stockholm
Publicerad : 06-28
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Senior ASIC Verification Engineer, Specman
We are looking for a Senior ASIC verification engineer, Specman for a project involving the development of very large and complex ASIC's with high technical demands. Job description - Develop advanced systems with high data rates. - You will working with among the most advanced and complex ASIC's in the world in 28 nm. - You will be working in a team of several ASIC developers. Competence/Experience - Must have - Long Experience of ASIC verification with Specman (e language, tools and methodology and building eVC's) - Experience of developing eVC's and test benches, preferably from scratch - Long Experience from block level verification, functional verification, test coverage strategies - Experience of constrained random verification, functional coverage and building verification testbenches with Specman - Experience of working with complex digital ASIC verification with several DSP's, CPU's and high speed links - Experience from formal verification, e.g. using assertions and constraints - Experience of design in VHDL - Fluent in English (verbal and writing) Competence/Experience - Nice to have - Experience of working with SystemVerilog UVM (pref) or OVM - Experience of developing oVC's/uVC's and test benches, preferably from scratch - Long experience from ASIC top level/system/SoC level verification and test coverage strategies - Long Experience from top level verification with Specman - Experience from C or C++ programming for top level verification - Experience of SystemC - Experience from top level verification using TLM (transaction level model) Personality - Self-motivated and driven, take initiative, open, see big picture, like challenges - Social, team player Assignment info - Location: Stockholm onsite - Assignment start: ASAP - Assignment duration: initially 6 months, with high possibility for extension to 1-2 years or more
Företag: AURENAV SWEDEN FILIAL AV AURENAV LLC USA
Ort: Stockholm
Publicerad : 01-30
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Senior ASIC Verification Engineer
Marvell Technology Sweden is a development site for IC devices and related SW products for the high end Network Processor market. The development of IC devices is fully undertaken within our team in Stockholm. This team manages all aspects of development of very large integrated circuits, i.e. architectural design, VHDL design, verification, layout, technology and IP selection. As a Verification Engineer at Marvell Sweden, you will be responsible for verification of significant functional blocks of the chip, or complete subsystems. You will participate in verification specification work, define requirements of test environments and independently implement tests according to specification. You will also jointly with colleagues evaluate and implement state-of-the-art verification methodologies and tools. The Verification Engineer is also a key contributor in lab validation of ASIC devices. The Traffic Management subsystem is developed in close cooperation with Marvell Israel and the verification engineer will work closely with collegues in Israel during the integration work. You will report to the Director ASIC & HW. Specific tasks will include: - Writing and reviewing verification specifications - Definition and development of test environments and test benches in SpecMan and System Verilog - Implementation of test cases in the appropriate language - Lab validation of functionality in ASIC devices Candidate profile: - Completed MScEE or equivalent - 3-5 years of professional experience of ASIC verification is required - Experience from verification of Traffic Management category of functionality is required - Experience from VHDL and related simulators is required - Experience from SpecMan is required - Experience from other languages such as C, tcl, PSL is a benefit - Located in the Stockholm area or willing to relocate. In possession of an EU work permit
Företag: Marvell Technology Sweden AB
Ort: Stockholm
Publicerad : 02-13
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Senior ASIC verification engineers
We are, fore one of our customer, looking for ASIC verification engineers. The team is developing complex designs for mobile communication. Job description: You will be part of a high end technology project with the goal to develop and verify complex digital mobile communication designs Your responsibility will be either top or block level verification of a ASIC/FPGA design Required competence Minimum 5 years experience of ASIC/FPGA verification Documented previous SystemVerilog experience UVM(OVM) experience Experience from verification of complex digital SoC designs with CPUs, DSPs, advanced filters and high speed links Candidates must be good team players with attention to detail, self-disciplined, able to manage their own time and workload, proactive and motivated Candidates shall also have good written and verbal communication skills in English Wanted competence (nice to have) Experience from C++, Specman (e), VHDL, Verilog, SystemC, PERL Xilinx and/or Altera experience Assignment start: ASAP Full time assignment, in-house in Stockholm.
Företag: SELLEGI TECHNOLOGIES AB
Ort: Stockholm
Publicerad : 09-11
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Senior ASIC Verification Engineer
Marvell Technology Sweden is a development site for IC devices and related SW products for the high end Network Processor market. The development of IC devices is fully undertaken within our team in Stockholm. This team manages all aspects of development of very large integrated circuits, i.e. architectural design, VHDL design, verification, layout, technology and IP selection. As a Verification Engineer at Marvell Sweden, you will be responsible for verification of significant functional blocks of the chip, or complete subsystems. You will participate in verification specification work, define requirements of test environments and independently implement tests according to specification. You will also jointly with colleagues evaluate and implement state-of-the-art verification methodologies and tools. The Verification Engineer is also a key contributor in lab validation of ASIC devices. You will report to a Subsystem Design Manager. Qualifications: - Completed MScEE or equivalent - 3-5 years of professional experience of ASIC verification - Experience from VHDL and related simulators is required - Experience from SpecMan is required - Experience from other languages such as SystemVerilog, C, tcl, PSL is a benefit Specific tasks will include: - Writing and reviewing verification specifications - Definition and development of test environments and test benches in SpecMan and System Verilog - Implementation of test cases in the appropriate language - Lab validation of functionality in ASIC devices
Företag: Marvell Technology Sweden AB
Ort: Stockholm
Publicerad : 11-06
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Senior ASIC verification engineer
We are, on behalf of one of our customers in Stockholm, looking for a number of ASIC/FPGA verification engineers to join a forefront development team in Stockholm. The team is developing complex designs for mobile communication. Assignment start: ASAP, project length in Sweden is 12-36 months. • You will be part of a high end technology project with the goal to develop and verify complex digital mobile communication designs • Your responsibility will be either top or block level verification of a ASIC/FPGA design Since we have been around for more than 30 years we have built up a strong network, which gives you the chance to participate in many exciting projects. We are a global company and can offer you the possibility of an international career. Required competence (need to have): • Minimum 5 years experience of ASIC/FPGA verification • Documented previous Specman (e) and/or SystemVerilog UVM experience • Experience from verification of complex digital SoC designs with advanced filters and high speed links • Candidates must be good team players with attention to detail, self-disciplined, able to manage their own time and workload, proactive and motivated • Candidates shall also have good written and verbal communication skills in English Wanted competence (nice to have): • Experience from C++, VHDL, Verilog, SystemC, PERL • Xilinx and/or Altera experience For further information please contact Patrik Millsjö, Account Manager on telephone: +46705666369. Apply on company web site: www.altran.se. As global leader in innovation and high-tech engineering consulting, Altran accompanies its clients in the creation and development of their new products and services. Altran's employees have been providing services for thirty years to key players in the Aerospace, Automotive, Energy, Railways, Finance, Healthcare and Telecoms sectors. Covering every stage of project development from strategic planning to manufacturing, Altran’s offers capitalise on the Group’s technological know-how in five key areas: Intelligent Systems, Innovative Product Development, Lifecycle Experience, Mechanical Engineering, and Information Systems. In 2015, the Group generated revenues of €1.945bn. Altran now has a staff of 27,000 employees in more than 20 countries. In Scandinavia, Altran is represented in Borlänge, Göteborg, Karlstad, Linköping, Lund, Malmö, Oslo and Stockholm with 550 employees.
Företag: Altran Sverige AB
Ort: Göteborg
Publicerad : 11-07
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Senior ASIC verification engineer, Stockholm
Som världsledande inom innovation och högteknologisk R&D utvecklar Altran tillsammans med sina kunder framtidens produkter och tjänster. Under mer än 30 år har Altran levererat lösningar till ledande företag och organisationer inom sektorer som rymd, fordon, energi, järnväg, finans, hälsovård och telekom. Genom att omfatta alla faser av produkt- och tjänsteutveckling, från strategisk planering till slutprodukt, har Altran en ledande position inom fem lösningsområden: Intelligent Systems, Innovative Product Development, Lifecycle Experience, Mechanical Engineering och Information Systems. I Skandinavien är Altran representerat i Borlänge, Göteborg, Karlstad, Linköping, Malmö, Stockholm och Oslo med cirka 550 medarbetare. Innovation är vår ledstjärna och det är därför vi kallar oss ”Innovation makers”. Internationellt har Altran 27 000 medarbetare i 23 länder. Under 2015 hade koncernen en omsättning på 1 945 miljoner euro. Since we have been around for more than 30 years we have built up a strong network, which gives you the chance to participate in many exciting projects. We are a global company and can offer you the possibility of an international career. Your development is our priority and we regularly hold both internal and external training. For us, solidarity and cohesion is important, and therefore we organize many social activities. We are a dynamic team of mixed ages who have fun together. We are doing well and we expand, do you want to be a part of it? Apply today! We are, on behalf of one of our customers in Stockholm, looking for a number of ASIC/FPGA verification engineers to join a forefront development team in Stockholm. The team is developing complex designs for mobile communication. You will be part of a high end technology project with the goal to develop and verify complex digital mobile communication designs Your responsibility will be either top or block level verification of a ASIC/FPGA design Required competence  * Minimum 5 years experience of ASIC/FPGA verification * Documented previous Specman (e) and/or SystemVerilog UVM experience * Experience from verification of complex digital SoC designs with advanced filters and high speed links * Candidates must be good team players with attention to detail, self-disciplined, able to manage their own time and workload, proactive and motivated * Candidates shall also have good written and verbal communication skills in English Experience from C++, VHDL, Verilog, SystemC, PERL and competence in Xilinx and/or Altera are also wanted.  Assignment start are as soon as possible and the project length in Sweden is 12-36 months.  Apply on our website www.altran.se or send you application by e-mail to rekrytering@altran.com  If you have any questions regarding the assignment please contact Patrik Millsjö, patrik.millsjo@altran.com
Företag: ALTRAN
Ort: Stockholm
Publicerad : 03-01
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Senior ASIC verification Engineer
Involved in developing test framework and test cases in ASIC verification are. Create verification components using System Verilog. Execute test cases. Debug test cases. Create documents like verification specification and reports. Candidate requires the following skills Test Planning and Development of Verification Environment using UVM MSc level in Electrical Engineering, Computer Science, or equivalent education. Up to 5 years of relevant work experience. Knowledge in C programming. Deep understanding and experience in using System Verilog. Very good understanding of VHDL. Good scripting experience in Perl, Python and Shell script Good working knowledge in Linux. Good working knowledge of Git. Good understanding of telecommunication protocols The Role consists of tasks as below among others Involved in developing test framework and test cases in ASIC verification are. Create verification components using System Verilog. Execute test cases. Debug test cases. Create documents like verification specification and reports. Stellar Consultants is a IT consulting company that provides only highly competent consultants in service of our esteemed customers. The work location would be at our client site. You might need to work from home or office from time to time.
Företag: Stellar Consultants AB
Ort: Lund
Publicerad : 05-09
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Senior ASIC verification engineer, Stockholm
Altran är ett världsledande konsultbolag och verkar inom bland annat fordonsindustri, telekom, försvar, energi, hälsovård, finansiell och offentlig sektor. Våra konsulter har expertkompetens inom en mängd områden som exempelvis inbyggda system, produktutveckling, mekanik och IT & digitalisering. Since we have been around for more than 30 years we have built up a strong network, which gives you the chance to participate in many exciting projects. We are a global company and can offer you the possibility of an international career. Your development is our priority and we regularly hold both internal and external training. For us, solidarity and cohesion is important, and therefore we organize many social activities. We are a dynamic team of mixed ages who have fun together. We are doing well and we expand, do you want to be a part of it? Apply today! We are, on behalf of one of our customers in Stockholm, looking for a number of ASIC/FPGA verification engineers to join a forefront development team in Stockholm. The team is developing complex designs for mobile communication. * You will be part of a high end technology project with the goal to develop and verify complex digital mobile communication designs * Your responsibility will be either top or block level verification of a ASIC/FPGA design Required competence  * Minimum 5 years experience of ASIC/FPGA verification * Documented previous Specman (e) and/or SystemVerilog UVM experience * Experience from verification of complex digital SoC designs with advanced filters and high speed links * Candidates must be good team players with attention to detail, self-disciplined, able to manage their own time and workload, proactive and motivated * Candidates shall also have good written and verbal communication skills in English Experience from C++, VHDL, Verilog, SystemC, PERL and competence in Xilinx and/or Altera are also wanted.  Assignment start are as soon as possible and the project length in Sweden is 12-36 months.  Apply on our website www.altran.se or send you application by e-mail to rekrytering@altran.com  If you have any questions regarding the assignment please contact Patrik Millsjö, patrik.millsjo@altran.com
Företag: ALTRAN
Ort: Stockholm
Publicerad : 07-05
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Senior ASIC Verification Engineer, System Verilog
The project scope is to develop new radio technology for 5G and some new radio based products for 4G. You will work with functional verification of new ASICs and FPGAs. The work will be carried out in close cooperation with RTL designers. The work includes: Verification planning Verification specification Verification environment (creation/adaptation/maintenance). Test case creation Usage of uVC´s Development of uVC´s (if needed) Usage of reference models (if needed) Constrained random testing Creation of Coverage matrix Writing Verification Reports Long experience from ASIC verification and test bench development Good knowledge of System Verilog and VHDL Experience from working with simulation tools such as Mentor and Cadence Experience from block level and sub-system level test benches using UVM Experience with version control systems English (verbal and writing) You will work as a consultant at our customers' sites paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 07-05
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Senior ASIC Verification Engineer, System Verilog
The project scope is to develop new radio technology for 5G and some new radio based products for 4G. You will work with functional verification of new ASICs and FPGAs. The work will be carried out in close cooperation with RTL designers. The work includes: Verification planning Verification specification Verification environment (creation/adaptation/maintenance). Test case creation Usage of uVC´s Development of uVC´s (if needed) Usage of reference models (if needed) Constrained random testing Creation of Coverage matrix Writing Verification Reports Long experience from ASIC verification and test bench development Good knowledge of System Verilog and VHDL Experience from working with simulation tools such as Mentor and Cadence Experience from block level and sub-system level test benches using UVM Experience with version control systems English (verbal and writing) You will work as a consultant at our customers' sites paventia.se
Företag: Paventia AB
Ort: Ospecificerad arbetsort
Publicerad : 10-10
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