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Senior ASIC verification engineer, StockholmSom världsledande inom innovation och högteknologisk R&D utvecklar Altran tillsammans med sina kunder framtidens produkter och tjänster. Under mer än 30 år har Altran levererat lösningar till ledande företag och organisationer inom sektorer som rymd, fordon, energi, järnväg, finans, hälsovård och telekom. Genom att omfatta alla faser av produkt- och tjänsteutveckling, från strategisk planering till slutprodukt, har Altran en ledande position inom fem lösningsområden: Intelligent Systems, Innovative Product Development, Lifecycle Experience, Mechanical Engineering och Information Systems. I Skandinavien är Altran representerat i Borlänge, Göteborg, Karlstad, Linköping, Malmö, Stockholm och Oslo med cirka 550 medarbetare. Innovation är vår ledstjärna och det är därför vi kallar oss âInnovation makersâ. Internationellt har Altran 27 000 medarbetare i 23 länder. Under 2015 hade koncernen en omsättning på 1 945 miljoner euro. Since we have been around for more than 30 years we have built up a strong network, which gives you the chance to participate in many exciting projects. We are a global company and can offer you the possibility of an international career. Your development is our priority and we regularly hold both internal and external training. For us, solidarity and cohesion is important, and therefore we organize many social activities. We are a dynamic team of mixed ages who have fun together. We are doing well and we expand, do you want to be a part of it? Apply today! We are, on behalf of one of our customers in Stockholm, looking for a number of ASIC/FPGA verification engineers to join a forefront development team in Stockholm. The team is developing complex designs for mobile communication. You will be part of a high end technology project with the goal to develop and verify complex digital mobile communication designs Your responsibility will be either top or block level verification of a ASIC/FPGA design Required competence * Minimum 5 years experience of ASIC/FPGA verification * Documented previous Specman (e) and/or SystemVerilog UVM experience * Experience from verification of complex digital SoC designs with advanced filters and high speed links * Candidates must be good team players with attention to detail, self-disciplined, able to manage their own time and workload, proactive and motivated * Candidates shall also have good written and verbal communication skills in English Experience from C++, VHDL, Verilog, SystemC, PERL and competence in Xilinx and/or Altera are also wanted. Assignment start are as soon as possible and the project length in Sweden is 12-36 months. Apply on our website www.altran.se or send you application by e-mail to rekrytering@altran.com If you have any questions regarding the assignment please contact Patrik Millsjö, patrik.millsjo@altran.com
Företag: ALTRAN
Ort: Stockholm
Publicerad : 03-01
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Senior ASIC verification engineer, Stockholm
Altran är ett världsledande konsultbolag och verkar inom bland annat fordonsindustri, telekom, försvar, energi, hälsovård, finansiell och offentlig sektor. Våra konsulter har expertkompetens inom en mängd områden som exempelvis inbyggda system, produktutveckling, mekanik och IT & digitalisering. Since we have been around for more than 30 years we have built up a strong network, which gives you the chance to participate in many exciting projects. We are a global company and can offer you the possibility of an international career. Your development is our priority and we regularly hold both internal and external training. For us, solidarity and cohesion is important, and therefore we organize many social activities. We are a dynamic team of mixed ages who have fun together. We are doing well and we expand, do you want to be a part of it? Apply today! We are, on behalf of one of our customers in Stockholm, looking for a number of ASIC/FPGA verification engineers to join a forefront development team in Stockholm. The team is developing complex designs for mobile communication. * You will be part of a high end technology project with the goal to develop and verify complex digital mobile communication designs * Your responsibility will be either top or block level verification of a ASIC/FPGA design Required competence * Minimum 5 years experience of ASIC/FPGA verification * Documented previous Specman (e) and/or SystemVerilog UVM experience * Experience from verification of complex digital SoC designs with advanced filters and high speed links * Candidates must be good team players with attention to detail, self-disciplined, able to manage their own time and workload, proactive and motivated * Candidates shall also have good written and verbal communication skills in English Experience from C++, VHDL, Verilog, SystemC, PERL and competence in Xilinx and/or Altera are also wanted. Assignment start are as soon as possible and the project length in Sweden is 12-36 months. Apply on our website www.altran.se or send you application by e-mail to rekrytering@altran.com If you have any questions regarding the assignment please contact Patrik Millsjö, patrik.millsjo@altran.com
Företag: ALTRAN
Ort: Stockholm
Publicerad : 07-05
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